Achieving a Higher Integration Level of Neuromorphic Hardware using Wafer Embedding

摘要

This thesis investigates the application of a chip packaging technology on a silicon wafer for a neuromorphic hardware system. The procedure embeds a complete silicon wafer into a printed circuit board (PCB). The embedding procedure was developed together with the Fraunhofer Institute for Reliability and Microintegration in Berlin. At first bare silicon disks were embedded into PCBs to find the correct material selection and the suitable stack up.udFinally, the HICANN wafers of the Electronic Visions Group, which are employed in the BrainScaleS system, were embedded into PCBs. For that reason 20 cm wafers are thinned down to 250 μm and the redistribution layer (RDL) pads get an additional copper layer. The Deep EvolutioN in System Embedding (DENSE) board has two copper layers and uses microvias for the connections to the wafer. Existing software of the BrainScaleS system is used to test and characterize the DENSE board. The tests cover the communication to the wafer and the functionality of the analog parameter storage and the neuron circuits.udIt is shown that the embedding process has no influence on the circuits and on the RDLs of the wafer. Additionally, the long-term reliability of the board was tested in a climate cabinet by conducting an accelerated environmental stress test. No failures were observable on the DENSE board.