The paper details on-chip inductor optimizationudfor a reconfigurable continuous-time delta-sigma (Δ-Σ) modulatorudbased radio-frequency analog-to-digital converter. Inductorudoptimisation enables the Δ-Σ modulator with Q enhanced LC tankudcircuits employing a single high Q-factor on-chip inductor andudlesser quantizer levels thereby reducing the circuit complexity forudexcess loop delay, power dissipation and dynamic elementudmatching. System level simulations indicate at a Q-factor of 75 Δ-udΣ modulator with a 3-level quantizer achieves dynamic ranges ofud106, 82 dB and 84 dB for RFID, TETRA, and Galileo overudbandwidths of 200 kHz, 10 MHz and 40 MHz respectively.
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