This paper studies the effects of capacitors non-idealities\udin the performance of un-even split-capacitor SAR ADCs.\udAlso, election of the m and l bits of MSB and LSB capacitors\udbanks, respectively, is studied to reduce SAR errors.To exemplify\udand quantify the non-idealities, MOM capacitors are used. In\udparticular, MOM layout parasitics and effective capacitor’s value\udis obtained with an electrical extraction tool using a flattened\udview of the MOM. Effects of capacitors layout placement in the\udSAR and their surroundings in the effective capacitance value are\udquantified. A quantitative study of a 10-bit un-even split-capacitor\udSAR is done for different combinations of m and l bits. Finally,\uda qualitative set of guidelines to choose the distribution of these\udbits is listed
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