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Efficient modelling of IC conducted emission for power integrity analysis

机译:IC传导发射的高效建模,用于电源完整性分析

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摘要

In this paper two methodologies to reduce the complexity of IC conducted emission models for Power Integrity analysis in ICs are presented. The methodologies differ concerning the applicability in simulation tools, complexity and accuracy of the generated models. The first methodology uses a complex model and reduces its order to generate a model with a fewer number of elements. This methodology therefore involves a model order reduction approach. A second minimum complexity, module based modelling approach is introduced for rough estimations, as the order reduced model is still too complex for some applications. The two methodologies are applied to an IC conducted emission model of two digital modules of a 32 Bit microcontroller. The results of the three models are compared and discussed. Fields of application for the introduced modelling approaches are the estimation of the magnitude and time behaviour of the supply current as well as the determination of the number and position of the IC's supply pins.
机译:本文提出了两种方法来降低用于IC功率完整性分析的IC传导发射模型的复杂性。这些方法在模拟工具的适用性,生成的模型的复杂性和准确性方面有所不同。第一种方法使用复杂的模型,并降低其顺序以生成具有较少元素数量的模型。因此,该方法论涉及模型降阶方法。引入了第二种最小复杂度,基于模块的建模方法以进行粗略估计,因为降阶模型对于某些应用仍然过于复杂。两种方法都适用于32位微控制器的两个数字模块的IC传导发射模型。比较并讨论了这三个模型的结果。引入的建模方法的应用领域是估计电源电流的大小和时间行为,以及确定IC电源引脚的数量和位置。

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