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Automatic generation of test infrastructures for analog integrated circuits by controllability and observability co-optimization

机译：通过可控性和可观察性共同优化，自动生成模拟集成电路的测试基础架构

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status: published

机译：状态：已发布

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作者
Coyette Anthony; Esen Vahap Baris; Dobbelaere Wim; Vanhooren Ronny; Gielen Georges;
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年度 2016
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正文语种 en
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1. Automatic generation of test infrastructures for analog integrated circuits by controllability and observability co-optimization [J] . Coyette Anthony, Esen Baris, Dobbelaere Wim, Integration . 2016,第SEPa期

机译：通过可控性和可观察性共同优化，自动生成模拟集成电路的测试基础架构
2. Topological Approach to Automatic Symbolic Macromodel Generation for Analog Integrated Circuits [J] . Shi Guoyong, Hu Hanbin, Deng Shuwen ACM Transactions on Design Automation of Electronic Systems . 2017,第3期

机译：模拟集成电路自动符号宏偶像生成的拓扑方法
3. LAYGEN II—Automatic Layout Generation of Analog Integrated Circuits [J] . Martins R., Lourenco N., Horta N. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems . 2013,第11期

机译：LAYGEN II-模拟集成电路的自动布局生成
4. Automatic generation of lightweight controllability and observability structures for analog circuits [C] . Coyette Anthony, Esen Baris, Vanhooren Ronny, International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design . 2015

机译：自动生成模拟电路的轻质可控性和可观察性结构
5. AUTOMATIC TEST GENERATION FOR ELECTRON-BEAM TESTING OF VLSI CIRCUITS [D] . KINCH, RICHARD JOHN 1982

机译：VLSI电路电子束测试的自动测试生成
6. Test Generation Algorithm for Fault Detection of Analog Circuits Based on Extreme Learning Machine [O] . Jingyu Zhou, Shulin Tian, Chenglin Yang, 2014

机译：基于极限学习机的模拟电路故障检测测试生成算法
7. Automatic Generation of Lightweight Controllability and Observability Structures for Analog Circuits [O] . Coyette Anthony, Esen Vahap Baris, Dobbelaere Wim, 2015

机译：自动生成模拟电路的轻量可控性和可观察性结构

Automatic generation of test infrastructures for analog integrated circuits by controllability and observability co-optimization

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