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Design, implementation and measurement of a 120 GHz 10 Gb/s phase-modulating transmitter in 65 nm LP CMOS

机译:在65 nm LP CMOS中设计,实现和测量120 GHz 10 Gb / s调相发射机

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摘要

A novel mm-wave phase modulating transmit architecture, capable of achieving data rates as high as 10 Gb/s is presented at 120 GHz. The circuit operates at a frequency of 120 GHz. The modulator consists of a differential branchline coupler and a high speed 4-to-1 analog multiplexer with direct digital input. Both a QPSK as well as a 8QAM constellation are supported. To achieve high output power, a 9-stage power amplifier is designed and connected to the multiplexer output. The complete chip is integrated in a 65 nm low power CMOS technology. Capacitive neutralization is used to achieve high gain and good stability for the MOS devices. Also, various differential transmission line topologies are investigated to achieve high performance in terms of loss and area consumption.
机译:在120 GHz频率下,提出了一种新颖的毫米波相位调制发射架构,该架构能够实现高达10 Gb / s的数据速率。该电路的工作频率为120 GHz。该调制器由一个差分支线耦合器和一个具有直接数字输入的高速4比1模拟多路复用器组成。同时支持QPSK和8QAM星座。为了获得高输出功率,设计了9级功率放大器并将其连接到多路复用器输出。完整的芯片集成在65 nm低功耗CMOS技术中。电容中和用于为MOS器件实现高增益和良好的稳定性。另外,研究了各种差分传输线拓扑,以实现损耗和面积消耗方面的高性能。

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