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Orthogonal correction implementation for time interleaved analog-to-digital converters: realtime application

机译：时间交错模数转换器的正交校正实现：实时应用

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Bossuet Lilian; Colucci Pierre; Dallet Dominique; Ferré Guillaume; Le Gal Bertrand; Maher Jridi;
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年度 2008
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1. Bandwidth Mismatch and Its Correction in Time-Interleaved Analog-to-Digital Converters [J] . Tsai T.-H., Hurst P.J., Lewis S.H. IEEE Transactions on Circuits and Systems. II, Express Briefs . 2006,第期

机译：时间交错的模数转换器中的带宽失配及其校正
2. Bandwidth Mismatch and Its Correction in Time-Interleaved Analog-to-Digital Converters [J] . Tsai T.-H., Hurst P.J., Lewis S.H. IEEE transactions on circuits and systems. II, Express briefs . 2006,第10期

机译：时间交错的模数转换器中的带宽失配及其校正
3. Comprehensive Digital Correction of Mismatch Errors for a 400-Msamples/s 80-dB SFDR Time-Interleaved Analog-to-Digital Converter [J] . Munkyo Seo, Mark J. W. Rodwell, Upamanyu Madhow IEEE Transactions on Microwave Theory and Techniques . 2005,第3期

机译：针对400Msamples / s 80-dB SFDR时间交错模数转换器的失配误差的全面数字校正
4. ORTHOGONAL CORRECTION IMPLEMENTATION FOR TIME INTERLEAVED ANALOG-TO-DIGITAL CONVERTERS: REALTIME APPLICATION [C] . G. Ferre, B. Le Gal, L. Bossuet, European Signal Processing Conference . 2009

机译：时间交错模数转换器的正交校正实现：实时应用
5. Design Techniques for Ultra-High-Speed Time-Interleaved Analog-to-Digital Converters(ADCs) [D] . Duan, Yida. 2015

机译：超高速时间交错模数转换器（ADC）的设计技术
6. An 8.8 ps RMS Resolution Time-To-Digital Converter Implemented in a 60 nm FPGA with Real-Time Temperature Correction [O] . Zhipeng Song, Zhixiang Zhao, Hongsen Yu, 2020

机译：在具有实时温度校正的60 nm FPGA中实现的8.8 ps RMS分辨率时间数字转换器
7. Bandwidth mismatch and its correction in time-interleaved analog-to-digital converters [O] . Tsung-heng Tsai, Paul J. Hurst, Stephen H. Lewis 2006

机译：时间交错的模数转换器中的带宽失配及其校正

Orthogonal correction implementation for time interleaved analog-to-digital converters: realtime application

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