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All‐Solid‐State Ion Synaptic Transistor for Wafer‐Scale Integration with Electrolyte of a Nanoscale Thickness

机译：全固态离子突触晶体管，用于晶圆尺度与纳米级厚度的电解液集成

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Ji‐Man Yu; Chungryeol Lee; Da‐Jin Kim; Hongkeun Park; Joon‐Kyu Han; Jae Hur; Jin‐Ki Kim; Myung‐Su Kim; Myungsoo Seo; Sung Gap Im; Yang‐Kyu Choi;
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1. All-Solid-State Ion Synaptic Transistor for Wafer-Scale Integration with Electrolyte of a Nanoscale Thickness [J] . Yu Ji-Man, Lee Chungryeol, Kim Da-Jin, Advanced Functional Materials . 2021,第23期

机译：全固态离子突触晶体管，具有纳米级厚度电解质的晶片级集成
2. Multi-functional logic circuits composed of ultra-thin electrolyte-gated transistors with wafer-scale integration [J] . Yu Ji-Man, Lee Chungryeol, Han Joon-Kyu, Journal of Materials Chemistry, C. materials for optical and electronic devices . 2021,第22期

机译：多功能逻辑电路由具有晶片级集成的超薄电解质门控晶体管组成
3. Thickness scaling of atomic-layer-deposited HfO2 films and their application to wafer-scale graphene tunnelling transistors [J] . Seong-Jun Jeong, Yeahyun Gu, Jinseong Heo, Scientific reports. . 2016,第1期

机译：原子层沉积的HFO2薄膜的厚度缩放及其在晶圆级石墨烯隧道隧道晶体管的应用
4. Si/InP Heterogeneous Integration Techniques from the Wafer-Scale (Hybrid Wafer Bonding) to the Discrete Transistor (Micro-Transfer Printing) [C] . Andrew D. Carter, Miguel E. Urteaga, Zachary M. Griffith, SOI-3D-Subthreshold Microelectronics Technology Unified Conference . 2018

机译：从晶圆级（混合晶圆键合）到分立晶体管（微转移印刷）的Si / InP异质集成技术
5. Large-area, wafer-scale epitaxial growth of germanium on silicon and integration of high-performance transistors. [D] . Ghosh, Swapnadip. 2014

机译：在硅上大面积，晶片级外延生长锗以及集成高性能晶体管。
6. Thickness scaling of atomic-layer-deposited HfO2 films and their application to wafer-scale graphene tunnelling transistors [O] . Seong-Jun Jeong, Yeahyun Gu, Jinseong Heo, -1

机译：原子层沉积HfO2薄膜的厚度定标及其在晶圆级石墨烯隧穿晶体管中的应用
7. Thickness scaling of atomic-layer-deposited HfO2 films and their application to wafer-scale graphene tunnelling transistors [O] . Seong-Jun Jeong, Yeahyun Gu, Jinseong Heo, 2016

机译：原子层沉积的HFO2薄膜的厚度缩放及其在晶圆级石墨烯隧道隧道晶体管的应用

All‐Solid‐State Ion Synaptic Transistor for Wafer‐Scale Integration with Electrolyte of a Nanoscale Thickness

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