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ELECTROTHERMAL EFFECTS IN HIGH DENSITY THROUGH SILICON VIA (TSV) ARRAYS

机译：通过硅通孔（TSV）阵列高密度的电热效应

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Wen-Sheng Zhao; Xiao-Peng Wang; Wen-Yan Yin;
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年度 2011
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1. Effects of Copper Plasticity on the Induction of Stress in Silicon from Copper Through-Silicon Vias (TSVs) for 3D Integrated Circuits [J] . Benjamin Backes, Colin McDonough, Larry Smith, Journal of Electronic Testing: Theory and Applications: Theory and Applications . 2012,第1期

机译：铜可塑性对3D集成电路的硅通孔（TSV）中硅中应力诱导的影响
2. Effects of Copper Plasticity on the Induction of Stress in Silicon from Copper Through-Silicon Vias (TSVs) for 3D Integrated Circuits [J] . Benjamin Backes, Colin McDonough, Larry Smith, Journal of Electronic Testing . 2012,第1期

机译：铜可塑性对3D集成电路的硅通孔（TSV）中硅中应力诱导的影响
3. Modeling and Analysis of a Power Distribution Network in TSV-Based 3-D Memory IC Including P/G TSVs, On-Chip Decoupling Capacitors, and Silicon Substrate Effects [J] . Kim K., Hwang C., Koo K., Components, Packaging and Manufacturing Technology, IEEE Transactions on . 2012,第12期

机译：基于TSV的3-D存储器IC（包括P / G TSV，片上去耦电容器和硅衬底效应）中配电网络的建模和分析
4. Wafer-level wet etching of high-aspect-ratio through silicon vias (TSVs) with high uniformity and low cost for silicon interposers with high-density interconnect of 3D packaging [C] . Liyi Li, Jiali Wu, Wong C.P. IEEE Electronic Components and Technology Conference . 2015

机译：具有3D封装的高密度互连的硅中介层的晶片级湿法高纵横比的硅通孔（TSV）具有高均匀性和低成本
5. Metal/hydrogenated amorphous silicon/crystalline silicon hetero-structure with directional breakdown: A low-cost, high-density, diode array approach to PROMs. [D] . Zhu, Hong. 2000

机译：具有方向性击穿的金属/氢化非晶硅/晶体硅异质结构：一种低成本，高密度的PROM二极管阵列方法。
6. Reflective lens-free imaging on high-density silicon microelectrode arrays for monitoring and evaluation of in vitro cardiac contractility [O] . Thomas Pauwelyn, Richard Stahl, Lakyn Mayo, 2018

机译：高密度硅微电极阵列上无反射镜成像用于监测和评估体外心脏收缩性
7. Rigorous Electrical Modeling of Through Silicon Vias (TSVs) with MOS Capacitance Effects [O] . Bandyopadhyay, Tapobrata, Han, Ki Jin, Chung, Daehyun, 2014

机译：具有MOS电容效应的硅通孔（TSV）的严格电气建模

ELECTROTHERMAL EFFECTS IN HIGH DENSITY THROUGH SILICON VIA (TSV) ARRAYS

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