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High Throughput Hardware Architecture for Motion Estimation with 4:1 Pel Subsampling Targeting Digital Television Applications

机译：高吞吐量硬件架构，用于运动估计，具有4：1 PEL限位式针对数字电视应用

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Marcelo Porto; Luciano Agostini; Leandro Rosa; Altamiro Susin; Sergio Bampi;
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1. A High-Throughput Hardware Architecture for the H.264/AVC Half-Pixel Motion Estimation Targeting High-Definition Videos [J] . Marcel M. Corrêa, Mateus T, Schoenknecht, International journal of reconfigurable computing . 2011,第1期

机译：针对高清视频的H.264 / AVC半像素运动估计的高吞吐量硬件架构
2. A High-Throughput Hardware Architecture for the H.264/AVC Half-Pixel Motion Estimation Targeting High-Definition Videos [J] . Marcel M.Corrêa, Mateus T.Schoenknecht, Robson S.Dornelles, International journal of reconfigurable computing . 2011,第S1期

机译：针对高清视频的H.264 / AVC半像素运动估计的高吞吐量硬件架构
3. Reconfigurable hardware implementation of an improved parallel architecture for MPEG-4 motion estimation in mobile applications [J] . Gao R., Xu D., Bentley J.P. IEEE Transactions on Consumer Electronics . 2003,第4期

机译：用于移动应用中MPEG-4运动估计的改进并行架构的可重配置硬件实现
4. High Throughput Hardware Architecture for Motion Estimation with 4:1 Pel Subsampling Targeting Digital Television Applications [C] . Marcelo Porto, Luciano Agostini, Leandro Rosa, Pacific Rim Symposium on Advances in Image and Video Technology(PSIVT 2007); 20071217-19; Santiago(CL) . 2007

机译：针对数字电视应用的4：1 Pel二次采样运动估计的高吞吐量硬件架构
5. Simplified and fast full -pel and sub -pel motion estimation for video coding [D] . Yi, Xiaoquan 2005

机译：用于视频编码的简化快速全象素和子象素运动估计
6. Depth from a Motion Algorithm and a Hardware Architecture for Smart Cameras [O] . Abiel Aguilar-González, Miguel Arias-Estrada, François Berry 2019

机译：智能相机运动算法和硬件体系结构的深度
7. A High Parallelism Hardware Architecture Design of the H.264/AVC Integer Motion Estimation for Applications in Real-time DTTV Transmissions [O] . Lunarejo José Luis Santos, Cárdenas Carlos Silva 2014

机译：H.264 / AVC整数运动估计的高并行硬件架构设计，用于实时DTTV传输
8. Pel-Recursive Motion Estimation for Image Coding [R] . Boroczky, L. 1991

机译：图像编码的pel递归运动估计

High Throughput Hardware Architecture for Motion Estimation with 4:1 Pel Subsampling Targeting Digital Television Applications

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