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High performance gate stack fabrication process of Ge MOS structure for future electronic devices

机译：GE MOS结构的高性能门堆制造工艺未来电子设备

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HARUKA FUJIWARA; HIROSHI YAMADA; MITARO NAMIKI; TOMO UENO; YOSHITAKA IWAZAKI;
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2. Effect of UV/VUV Enhanced RTP on Process Variation and Device Performance of Metal Gate/High-K Gate Stacks for the Sub-90-nm CMOS Regime [J] . Daniel Damjanovic, Harish Kumar Bolla, Rajendra Singh, IEEE Transactions on Semiconductor Manufacturing . 2005,第1期

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3. Gate stack technology for advanced high-mobility Ge-channel metal-oxide-semiconductor devices - Fundamental aspects of germanium oxides and application of plasma nitridation technique for fabrication of scalable oxynitride dielectrics [J] . Watanabe H., Kutsuki K., Kasuya A., Current applied physics: the official journal of the Korean Physical Society . 2012,第Suppla3期

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4. Fabrication of high-performance Ge-MOS structure using Al2O3/TiO2stacked gate insulating film [C] . Kenichiro Toyoda, Keisuke Ito, Yoshitaka Iwazaki, International Workshop on Active-Matrix Flatpanel Displays and Devices . 2021

机译：使用Al2O3 / TiO2Stacked栅极绝缘膜的高性能Ge-MOS结构的制造
5. Fabrication and device characterization of alternative gate stacks using the non self-aligned gate process. [D] . Han, Sungkee. 2003

机译：使用非自对准栅工艺的替代栅叠层的制造和器件表征。
6. A Unique Approach to Generate Self-Aligned SiO2/Ge/SiO2/SiGe Gate-Stacking Heterostructures in a Single Fabrication Step [O] . Wei-Ting Lai, Kuo-Ching Yang, Ting-Chia Hsu, 2015

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7. Liquid-Gated Organic Electronic Devices Based on High-Performance Solution-Processed Molecular Semiconductor [O] . Di Lauro, Michele, Berto, Marcello, Giordani, Martina, 2017

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8. The Future of Electronic Device Design: Device and Process Simulation Find Intelligence on the World Wide Web [R] . Biegel, Bryan A. 1999

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High performance gate stack fabrication process of Ge MOS structure for future electronic devices

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