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Electromagnetic Analysis of Vertical Resistive Memory with a Sub-nm Thick Electrode

机译：子NM厚电极垂直电阻存储器的电磁分析

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Batyrbek Alimkhanuly; Sanghoek Kim; Lok-won Kim; Seunghyun Lee;
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1. Low-resistivity C54-TiSi2 as a sidewall-confinement nanoscale electrode for three-dimensional vertical resistive memory [J] . Duran Retamal Jose Ramon, Kang Chen-Fang, Yang Po-Kang, Applied Physics Letters . 2014,第18期

机译：低电阻率C54-TiSi 2 作为三维垂直电阻存储器的侧壁约束纳米级电极
2. Low-resistivity C54-TiSi_2 as a sidewall-confinement nanoscale electrode for three-dimensional vertical resistive memory [J] . Jose Ramon Duran Retamal, Chen-Fang Kang, Po-Kang Yang, Applied Physics Letters . 2014,第18期

机译：低电阻率C54-TiSi_2作为三维垂直电阻存储器的侧壁约束纳米级电极
3. Experimental study of plane electrode thickness scaling for 3D vertical resistive random access memory [J] . Chen H.-Y., Yu S., Gao B., Nanotechnology . 2013,第46期

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4. Modeling and design analysis of 3D vertical resistive memory — A low cost cross-point architecture [C] . Xu Cong, Niu Dimin, Yu Shimeng, Asia and South Pacific Design Automation Conference . 2014

机译：3D垂直电阻式存储器的建模和设计分析—低成本的交叉点架构
5. Polypyrrole (PPy) Coated Patterned Vertical Carbon Nanotube (pvCNT) Dry ECG Electrode Integrated with a Novel Wireless Resistive Analog Passive (WRAP) ECG Sensor [D] . Abu Saude, Mohammad 2018

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6. Electromagnetic Analysis of Vertical Resistive Memory with a Sub-nm Thick Electrode [O] . Batyrbek Alimkhanuly, Sanghoek Kim, Lok-won Kim, 2020

机译：子NM厚电极垂直电阻存储器的电磁分析
7. Low-resistivity C54-TiSi2 as a sidewall-confinement nanoscale electrode for three-dimensional vertical resistive memory [O] . Duran Retamal Jose Ramon, Kang Chen-Fang, Yang Po-Kang, 2014

机译：低电阻率C54-TiSi2作为三维垂直电阻存储器的侧壁约束纳米级电极

Electromagnetic Analysis of Vertical Resistive Memory with a Sub-nm Thick Electrode

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