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Design, Analysis and Modeling of the Effect of the Phase Detector in Digital Phase-Locked Loops

机译：在数字锁相环中相位检测器的设计，分析和建模

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Samira Bashiri Amid;
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1. Extended Kalman Filtering and Phase Detector Modeling for a Digital Phase-Locked Loop [J] . Tsai-Sheng Kao, Sheng-Chih Chen, Yuan-Chang Chang, WSEAS Transactions on Communications . 2009,第7a9期

机译：数字锁相环的扩展卡尔曼滤波和鉴相器建模
2. Analysis and Design of a Digital Phase-Locked Loop for Single-Phase Grid-Connected Power Conversion Systems [J] . Zhang Q., Sun X.-D., Zhong Y.-R., Industrial Electronics, IEEE Transactions on . 2011,第8期

机译：单相并网功率转换系统数字锁相环的分析与设计
3. Design, real-time modelling, simulation and digital implementation of phase-locked loop-based auto-synchronising current-sourced converter for an induction heating prototype [J] . Roy Molay, Sengupta Mainak Sadhana: Academy Proceedings in Engineering Science . 2017,第6期

机译：基于锁相环的自同步电流型转换器的设计，实时建模，仿真和数字实现，用于感应加热原型
4. Time-Varying, Frequency-Domain Modeling and Analysis of Phase-Locked Loops with Sampling Phase-Frequency Detectors [C] . Piet Vanassche, Georges Gielen, Willy Sansen, Workshop on New security paradigms workshop . 2009

机译：带采样相频检测器的锁相环的时变，频域建模和分析
5. ON A CLASS OF ALL DIGITAL PHASE-LOCKED LOOPS: MODELLING, ANALYSIS AND APPLICATIONS. [D] . REDDY, CHENNAREDDY PATTABHIRAMI. 1972

机译：关于一类所有数字锁相环：建模，分析和应用。
6. Self-organized synchronization of digital phase-locked loops with delayed coupling in theory and experiment [O] . Lucas Wetzel, David J. Jörg, Alexandros Pollakis, -1

机译：具有延迟耦合的数字锁相环的自组织同步理论与实验
7. Noise-shaping all-digital phase-locked loops: modeling, simulation, analysis and design [O] . Brandonisio Francesco, Kennedy Michael Peter 2014

机译：噪声整形全数字锁相环：建模，仿真，分析和设计
8. ANALYSIS AND DESIGN OF A SECOND-ORDER DIGITAL PHASE-LOCKED LOOP [R] . Paul R. Blasche 1979

机译：二阶数字锁相环的分析与设计

Design, Analysis and Modeling of the Effect of the Phase Detector in Digital Phase-Locked Loops

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