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A dynamic computation method for fast and accurate performance evaluation of multi-core architectures

机译:一种动态计算方法,用于多核架构的快速准确评估

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摘要

Early estimation of performance has become necessary to facilitate design of complex multi-core architectures. Performance evaluation based on extensive simulations is time consuming and needs to be improved to allow exploration of different architectures in acceptable time. In this paper, we propose a method that improves the tradeoff between simulation speed and accuracy in performance models of architectures. This method computes during model execution some of the synchronization instants involved in architecture evolution. It allows grouping and abstracting architecture processes and this way significantly reduces the number of simulation events. Experiments show significant benefits from the computation method on the simulation time. Especially, a simulation speed-up by a factor of 4 is achieved in the considered case study, with no loss of accuracy about estimation of processing resource usage. The proposed method has potential to support automatic generation of efficient architecture models.
机译:对性能的早期评估对于促进复杂的多核体系结构的设计变得十分必要。基于大量仿真的性能评估非常耗时,需要进行改进以允许在可接受的时间内探索不同的体系结构。在本文中,我们提出了一种在架构性能模型中提高仿真速度和精度之间权衡的方法。该方法在模型执行期间计算架构演化中涉及的一些同步瞬间。它允许对体系结构过程进行分组和抽象,并且这种方式大大减少了仿真事件的数量。实验表明,该计算方法对仿真时间具有明显的好处。尤其是,在所考虑的案例研究中,仿真速度提高了4倍,而不会损失处理资源使用估算的准确性。所提出的方法具有支持自动生成有效架构模型的潜力。

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