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Dual-side and three-dimensional microelectrode arrays fabricated from ultra-thin silicon substrates

机译:由超薄硅衬底制成的双面和三维微电极阵列

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摘要

A method for fabricating planar implantable microelectrode arrays was demonstrated using a process that relied on ultra-thin silicon substrates, which ranged in thickness from 25 to 50 µm. The challenge of handling these fragile materials was met via a temporary substrate support mechanism. In order to compensate for putative electrical shielding of extracellular neuronal fields, separately addressable electrode arrays were defined on each side of the silicon device. Deep reactive ion etching was employed to create sharp implantable shafts with lengths of up to 5 mm. The devices were flip-chip bonded onto printed circuit boards (PCBs) by means of an anisotropic conductive adhesive film. This scalable assembly technique enabled three-dimensional (3D) integration through formation of stacks of multiple silicon and PCB layers. Simulations and measurements of microelectrode noise appear to suggest that low impedance surfaces, which could be formed by electrodeposition of gold or other materials, are required to ensure an optimal signal-to-noise ratio as well a low level of interchannel crosstalk.
机译:使用依赖于厚度范围从25到50μm的超薄硅衬底的工艺,证明了制造平面可植入微电极阵列的方法。通过临时的基板支撑机制解决了处理这些易碎材料的挑战。为了补偿对细胞外神经元场的假定电屏蔽,在硅器件的每一侧上定义了可单独寻址的电极阵列。采用深度反应离子刻蚀来创建尖锐的可植入轴,长度可达5毫米。器件通过各向异性导电胶膜倒装芯片连接到印刷电路板(PCB)上。这种可扩展的组装技术通过形成多层硅层和PCB层的堆栈,实现了三维(3D)集成。微电极噪声的仿真和测量似乎表明,需要低阻抗的表面(可以通过金或其他材料的电沉积形成),以确保最佳的信噪比以及低水平的通道间串扰。

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