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A Sensitive Method to Measure the Integral Nonlinearity of a Digital-to-Time Converter Based on Phase Modulation

机译:基于相位调制测量数字转换器的积分非线性的敏感方法

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摘要

A digital-to-time converter (DTC) produces a time delay based on a digital code. Similar to data converters, linearity is a key metric for a DTC and it can be characterized by its integral nonlinearity (INL). However, measuring the INL of a subpicosecond-resolution DTC is problematic, even when using the best available high-speed oscilloscopes. In this brief we propose a new method to measure the INL of a DTC by applying digital phase modulation and measuring the output spectrum with a spectrum analyzer. The frequency selectivity of this method allows for an improved measurement resolution down to a few femtoseconds and allows measuring an INL below 100 fs. The proposed method is verified by behavioral simulations and is employed to measure the INL of a high-resolution DTC realized in the 65-nm CMOS, with a time resolution of 25 fs and a standard deviation of 27 fs.
机译:数字转换器(DTC)产生基于数字代码的时间延迟。类似于数据转换器,线性度是DTC的密钥度量,它可以以其积分的非线性(INL)为特征。然而,测量亚单秒分辨率DTC的INL也存在问题,即使在使用最佳可用的高速示波器时也是有问题的。在此简介中,我们提出了一种通过应用数字相位调制和用频谱分析仪测量输出频谱来测量DTC的INL的新方法。该方法的频率选择性允许改进的测量分辨率降至一些飞秒,并允许测量低于100 fs的INL。所提出的方法是通过行为模拟验证的,并且用于测量在65nm CMOS中实现的高分辨率DTC的INL,具有25 fs的时间分辨率和27 fs的标准偏差。

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