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Fabrication of Schottky barrier MOSFETs using self-assembly CoSi2 nanopatterning and spacer gate technologies

机译:使用自组装COSI2纳米透视仪和垫片栅极技术制造肖特基屏障MOSFET

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摘要

A self-assembly patterning method for generation of epitaxial CoSi2 nanostructures was used to fabricate 50 nm channel-length MOSFETs. The transistors have either a symmetric structure with Schottky source and drain or an asymmetric structure with n(+)-source and Schottky drain. The patterning technique is based on anisotropic diffusion of Co/Si atoms in a strain field during rapid thermal oxidation. The strain field is generated along the edges of a mask consisting of 20 nm SiO2 and 300 nm Si3N4. During rapid thermal oxinitridation (RTON) of the masked silicide structure, a well-defined separation of the silicide layer forms along the edge of the mask. These highly uniform gaps define the channel region of the fabricated device. The separated silicide layers act as metal source and drain. A poly-Si spacer was used as the gate contact. The asymmetric transistor was fabricated by ion implantation into the unprotected CoSi2 layer and a subsequent out-diffusion process to form the n(+)-source. I-V characteristics of both the symmetric and asymmetric transistor structures have been investigated. (C) 2003 Elsevier B.V. All rights reserved.
机译:用于产生外延Cosi2纳米结构的自组装图案化方法制造50nm沟道长度MOSFET。晶体管具有对称结构,具有肖特基源和漏极或具有N(+)源和肖特基漏极的不对称结构。在快速热氧化期间,图案化技术基于Co / Si原子的各向异性扩散。沿着由20nm SiO2和300nm Si3N4组成的掩模的边缘产生应变场。在掩蔽硅化物结构的快速热氧化氧化(Rton)期间,硅化物层的明确分离沿着掩模的边缘形成。这些高度均匀的间隙限定了制造装置的沟道区域。分离的硅化物层充当金属源和漏极。使用Poly-Si垫片作为栅极接触。通过离子注入将不对称晶体管制成未受保护的COSI2层和随后的过扩散过程以形成N(+)源。已经研究了对称和不对称晶体管结构的I-V特性。 (c)2003 Elsevier B.v.保留所有权利。

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