首页> 外文OA文献 >Low-power subthreshold to above threshold level shifters in 90nm and 65nm process
【2h】

Low-power subthreshold to above threshold level shifters in 90nm and 65nm process

机译:低功率亚阈值到90nm和65nm过程中的阈值电平移位器

代理获取
本网站仅为用户提供外文OA文献查询和代理获取服务,本网站没有原文。下单后我们将采用程序或人工为您竭诚获取高质量的原文,但由于OA文献来源多样且变更频繁,仍可能出现获取不到、文献不完整或与标题不符等情况,如果获取不到我们将提供退款服务。请知悉。

摘要

Down-scaling of the supply voltage is considered as the most effective means of reducing the power- and energy consumption of integrated circuits (ICs). Reduction in the power- and energy consumption is highly beneficial in aerospace and defense applications that have a constrained power budget. These applications include, but are not necessarily limited to, payloads in solar powered spacecraft and rovers. The benefits that can be harvested from reducing the powerand energy consumption in such applications are reduced weight, reduced mass and/or increased functionality for a given power budget. Although supply voltage scaling can improve the energy efficiency of ICs, radiation induced errors also tend to increase with decreasing supply voltage. In order to enable reliable operation in radiation-rich environments, radiation induced errors must be mitigated, preferably with minimum area, power and performance penalties.In this thesis, the single event upset (SEU) dependence on supply voltage scaling is investigated for data flip-flops (DFFs) designed in 90 nm and 65 nm CMOS technology nodes. The radiation tolerance of the DFFs was characterized at supply voltages between 0.18 V and 1 V, and heavy ion radiation testing was performed using ions with linear energy transfer (LET) between 5:8 MeV-cm2=mg and 68:8 MeV-cm2=mg. Both temporal and spatial hardening techniques are utilized as a means of mitigating SEUs, and the impact of drive strength and sensitive node separation is evaluated. The examined circuit-level hardening techniques include triple modular redundancy (TMR), dual interlocked storage cell (DICE) and temporal dual-feedback (TDF), as well as inverter-based and current starved delay elements for SET filtering purposes.This study shows that radiation tolerant DFFs can offer soft error rate (SER) improvements of up to 55x, 121x and 600x, compared to a standard non-radiation tolerant DFF, when scaling the supply voltage down to 0.18 V, 0.25 V and 0.5 V, respectively. Simultaneously, by scaling the supply voltage down to 0.5 V and 0.25 V, radiation tolerant DFFs can achieve ~3.9x and ~12x higher energy efficiency, compared to when operating at a supply voltage of 1 V. Selective placement of high drive strength components showed to reduce the SEU sensitivity in DFFs by up to 112x, compared to DFFs utilizing standard drive strength. The impact of charge sharing was, on the other hand, increasingly challenging to mitigate with decreasing supply voltage. Nevertheless, based on the findings in this work, radiation tolerant DFFs operated at reduced supply voltage offer a clear advantage over standard non-radiation tolerant DFFs, and may therefore be suited for implementation in low power payloads, depending on the error rate requirements of the application.In addition to investigating the SEU dependence on supply voltage scaling, this thesis also presents the design and performance of subthreshold to above threshold level shifters, and the characterization of the proton beam properties at the Oslo Cyclotron Laboratory (OCL).
机译:电源电压的下缩放被认为是降低集成电路(IC)的功率和能量消耗的最有效手段。减少功率和能耗在具有约束力预算的航空航天和防御应用方面具有高度有益的。这些应用程序包括但不一定限于太阳能航天器和群体中的有效载荷。可以从降低这种应用中减少幂能耗的益处减轻了给定功率预算的重量,减少质量和/或增加的功能。虽然电源电压缩放可以提高IC的能量效率,但辐射引起的误差也随着电源电压的降低而增加。为了在富裕的环境中实现可靠的操作,必须减轻辐射引起的误差,优选地具有最小面积,功率和绩效惩罚。本文研究了单一事件扰乱(SEU)对电源电压缩放的依赖性进行数据翻转-Flops(DFF)以90nm和65 nm CMOS技术节点设计。 DFF的辐射耐受性在0.18V和1V之间的电源电压的特征,并且使用线性能量转移(Let)的离子进行重离子辐射测试,在5:8mev-cm 2 = Mg和68:8mev-cm2之间进行= mg。时间和空间硬化技术都用作减轻SEU的手段,并评估驱动强度和敏感节点分离的影响。检查的电路电平硬化技术包括三重模块化冗余(TMR),双互锁的存储单元(骰子)和时间双反馈(TDF),以及用于设置过滤目的的基于逆变器和电流饥饿的延迟元件。本研究表明与标准的非辐射耐受性DFF相比,辐射耐受性DFF可提供高达55倍,121倍和600倍的软错误率(SER)改进,当标准的非辐射耐受性DFF分别将电源电压分别降至0.18 V,0.25 V和0.5V时。同时,通过将电源电压缩放到0.5 V和0.25 V,与在电源电压的电源电压下操作时,辐射容耐DFF可以实现〜3.9倍和〜12倍的能量效率。选择性放置高驱动强度部件的选择性放置与利用标准驱动强度的DFF相比,将DFF的SES敏感度降低到高达112倍。另一方面,电荷分享的影响越来越挑战,以减少电源电压降低。尽管如此,根据该工作的发现,在降低供应电压下操作的辐射耐受性DFF在标准的非辐射耐受性DFF上提供了明显的优势,因此可以适用于低功率有效载荷,这取决于误差率要求应用。除了调查SEU对电源电压缩放的依赖性,本文还介绍了亚阈值水平移位器的亚阈值的设计和性能,以及奥斯陆回旋速实验室(OCL)的质子梁特性的表征。

著录项

相似文献

  • 外文文献
  • 中文文献
  • 专利
代理获取

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号