Analysis of Transfer Gate Doping Profile Influence on Dark Current and FWC in CMOS Image Sensors

摘要

The influence of transfer gate (TG) doping profile on dark current and full well capacity (FWC) has been investigated in this article. By analyzing the non-uniform doped TG channel in 4T pixel, a potential profile with a barrier is extracted at TG off state. In this analysis, twice P-type doping under TG directly determine the barrier position and its height. By adjusting the two P-type doping length under TG, dark current under TG is drained to floating diffusion instead of pinned photodiode, which is divided by the barrier. On the other hand, the increase of doping implantation under TG is beneficial to FWC due to the increased barrier height. Technology computer aided design (TCAD) simulations are performed to verify the analysis. Furthermore, a test chip with $6,,mu ext{m},, {mathrm {imes }},,6,,mu ext{m}$ pixels fabricated in a $0.11~mu ext{m}$ CMOS process is tested. In our design, by shortening ${L} _{TG _{}PD}$ and extending ${L} _{TG _{}FD}$ , dark current reduces by 15% and 17%, respectively. In the case of a certain doping profile under TG, shorting the length of TG from $0.6~mu ext{m}$ to $0.4~mu ext{m}$ helps reduce dark current by 30% at the cost of 6% FWC reduction.