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A New Rail-to-Rail Second Generation Voltage Conveyor

机译:一种新的轨到轨第二代电压输送机

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摘要

In this paper, a novel low voltage low power CMOS second generation voltage conveyor (VCII) with an improved voltage range at both the X and Z terminals is presented. The proposed VCII is formed by a current buffer based on a class AB regulated common-gate stage and a modified rail-to-rail voltage buffer. Spice simulation results using LFoundry 0.15 μm low-Vth CMOS technology with a ±0.9 V supply voltage are provided to demonstrate the validity of the designed circuit. Thanks to the class AB behavior, from a bias current of 10 µA, the proposed VCII is capable of driving 0.5 mA on the X terminal, with a total power consumption of 120 µW. The allowed voltage swing on the Z terminal is at least equal to ±0.83 V, while on the X terminals it is ±0.72 V. Both DC and AC voltage and current gains are provided, and time domain simulations, where the voltage conveyor is used as a transimpedance amplifier (TIA), are also presented. A final table that summarizes the main features of the circuit, comparing them with the literature, is also given.
机译:本文提出了一种新颖的低压低功率CMOS第二代电压输送器(VCII),其两个X和Z端子都有改进的电压范围。所提出的VCII由基于AB类调节的公共栅极级和改进的轨到轨电压缓冲器的电流缓冲器形成。提供了使用LFoundry0.15μm的低Vth CMOS技术的Spice仿真结果,具有±0.9 V电源电压,以证明设计电路的有效性。由于AB类行为,从10μA的偏置电流,所提出的VCII能够在X端子上驱动0.5 mA,总功耗为120μW。 Z端子上的允许电压摆动至少等于±0.83V,而在x端子上,它为±0.72 V.提供了DC和AC电压和电流收益,使用电压输送机的时域模拟。作为跨阻抗放大器(TIA)也是如此。还给出了总结电路主要特征的最终表,并提供与文献相比。

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