Cascaded Multilevel Inverter Topology Based on Cascaded H-Bridge Multilevel Inverter

摘要

A three-phase multilevel inverter topology for use in various applications is proposed. The present topology introduces a combination of a cascaded H-bridge multilevel inverter with a cascaded three-phase voltage source inverter (three-phase triple voltage source inverter (TVSI)). This combination will increase the number of voltage levels generated when using fewer components compared with the conventional multilevel inverter topologies for the same voltage levels generated. The other advantage gained from the proposed configuration is the assurance of a continuous power supply to the grid in case of failure in one part of the proposed configuration. In addition, the voltage stresses on switches are reduced by half compared if each part in the proposed topology is working independently. The comparison of the proposed topology with some conventional multilevel inverter topologies is presented. The proposed topology is built in the SIMULINK environment and is simulated under various loads in addition to being connected to the grid. Phase-shifted pulse width modulation technique is used to generate the required switching pulses to drive the switches of the proposed topology. The inverter is experimentally implemented in the lab, and the switching pulses are generated with the help of MicroLabBox produced by dSPACE (digital signal processing and control engineering) company. The simulation and experimental results and their comparisons are presented to verify the proposed topology’s effectiveness and reliability.