首页> 外文OA文献 >Efficiency Versus Accuracy: A Review of Design Techniques for DNN Hardware Accelerators

【2h】

Efficiency Versus Accuracy: A Review of Design Techniques for DNN Hardware Accelerators

机译：效率与准确性：DNN硬件加速器设计技术综述

代理获取

本网站仅为用户提供外文OA文献查询和代理获取服务，本网站没有原文。下单后我们将采用程序或人工为您竭诚获取高质量的原文，但由于OA文献来源多样且变更频繁，仍可能出现获取不到、文献不完整或与标题不符等情况，如果获取不到我们将提供退款服务。请知悉。

页面导航

著录项
引文网络
相似文献
相关主题

著录项

作者
Cecilia Latotzke; Tobias Gemmeke;
展开▼
作者单位

展开▼
年度 2021
总页数
原文格式 PDF
正文语种
中图分类

相似文献

外文文献
中文文献
专利

1. Efficiency Versus Accuracy: A Review of Design Techniques for DNN Hardware Accelerators [J] . Cecilia Latotzke, Tobias Gemmeke Quality Control, Transactions . 2021,第1期

机译：效率与准确性：DNN硬件加速器设计技术综述
2. Providing Mobile Traffic Analysis As-a-service: Design of a Service-based Infrastructure to Offer High-accuracy Traffic Classifiers Based on Hardware Accelerators [J] . Mario Barbareschi, Alessandra De Benedictis, Antonino Mazzeo, Journal of digital information management . 2015,第4期

机译：提供移动流量分析即服务：基于服务的基础结构设计，可提供基于硬件加速器的高精度流量分类器
3. Machine Learning Versus Standard Techniques for Updating Searches for Systematic Reviews: A Diagnostic Accuracy Study [J] . Shekelle Paul G., Shetty Kanaka, Newberry Sydne, Annals of Internal Medicine . 2017,第3期

机译：更新系统评论的搜索和标准技术的机器学习：诊断准确性研究
4. On the Efficiency of Register File versus Broadcast Interconnect for Collective Communications in Data-Parallel Hardware Accelerators [C] . Pedram Ardavan, Gerstlauer Andreas, van de Geijn Robert A. The 24th International Symposium on Computer Architecture and High Performance Computing. . 2012

机译：数据并行硬件加速器中集体通信的寄存器文件与广播互连效率比较
5. Design and Generation of Efficient Hardware Accelerators for Sparse and Dense Tensor Computations [D] . ?Srivastava, Nitish Kumar 2020

机译：设计和生成的稀疏和密集计算中张量高效的硬件加速器
6. Boosting Throughput and Efficiency of Hardware Spiking Neural Accelerators Using Time Compression Supporting Multiple Spike Codes [O] . Changqing Xu, Wenrui Zhang, Yu Liu, 2020

机译：使用时间压缩支撑多穗码的硬件尖峰神经加速器的吞吐量和效率
7. On the Efficiency of Register File versus Broadcast Interconnect for Collective Communications in Data-Parallel Hardware Accelerators [O] . Ardavan Pedram, Andreas Gerstlauer, Robert A. Van De Geijn 2014

机译：数据并行硬件加速器中集体通信的寄存器文件与广播互连的效率
8. Space biology initiative program definition review. Trade study 5: Modification of existing hardware (COTS) versus new hardware build cost analysis [R] . Jackson, L. Neal, Crenshaw, John, Sr., Davidson, William L., 1989

机译：空间生物学倡议计划定义审查。贸易研究5：现有硬件（COTs）的修改与新的硬件构建成本分析

Efficiency Versus Accuracy: A Review of Design Techniques for DNN Hardware Accelerators

著录项

引文网络

相似文献

相关主题

期刊订阅