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Design of 2.5D Interposer in High Bandwidth Memory and Through Silicon Via for High Speed Signal

机译：高带宽存储器中的2.5D插入器和高速信号的硅通孔设计

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Bo Pu;
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年度 2020
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1. Signal Integrity Design and Analysis of Silicon Interposer for GPU-Memory Channels in High-Bandwidth Memory Interface [J] . Kyungjun Cho, Youngwoo Kim, Hyunsuk Lee, Components, Packaging and Manufacturing Technology, IEEE Transactions on . 2018,第9期

机译：高带宽内存接口中GPU内存通道硅中介层的信号完整性设计和分析
2. Signal Integrity Design and Analysis of Differential High-Speed Serial Links in Silicon Interposer With Through-Silicon Via [J] . Cho Kyungjun, Kim Youngwoo, Lee Hyunsuk, Components, Packaging and Manufacturing Technology, IEEE Transactions on . 2019,第1期

机译：带有硅通孔的硅中介层中的差分高速串行链路的信号完整性设计和分析
3. Boundary scan based interconnect testing design for silicon interposer in 2.5D ICs [J] . Integration . 2020,第May期

机译：2.5D IC中的硅中介层基于边界扫描的互连测试设计
4. Design of 2.5D Interposer in High Bandwidth Memory and Through Silicon Via for High Speed Signal [C] . Bo Pu, Jun So Pak, Chanmin Jo, Design Conference . 2019

机译：高带宽存储器中的2.5D插入器和高速信号的硅通孔设计
5. Modeling, design, and characterization of through vias in silicon and glass interposers [D] . Bandyopadhyay, Tapobrata 2011

机译：硅和玻璃中介层中通孔的建模，设计和表征
6. V(D)J recombination frequency is affected by the sequence interposed between a pair of recombination signals: sequence comparison reveals a putative recombinational enhancer element. [O] . F A Roch, R Hobi, M W Berchtold, 1997

机译：V（D）J重组频率受插在一对重组信号之间的序列的影响：序列比较揭示了推定的重组增强子元件。
7. Design of 2.5D Interposer in High Bandwidth Memory and Through Silicon Via for High Speed Signal [O] . Bo Pu 2020

机译：高带宽存储器中的2.5D插入器和高速信号的硅通孔设计
8. Balance in machine architecture: Bandwidth on board and offboard, integer/control speed and flops versus memory [R] . Fischler, M 1992

机译：机器架构中的平衡：板载和板外带宽，整数/控制速度和触发器与内存

Design of 2.5D Interposer in High Bandwidth Memory and Through Silicon Via for High Speed Signal

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