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Test architecture design and optimization for three-dimensional system-on-chips.

机译：Test architecture design and optimization for three-dimensional system-on-chips.

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Jiang, Li.

机译：Jiang, l i.

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年度 2010
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正文语种 eng
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1. Structural Design and Optimization of Comb-type Electric Bicycle Three-dimensional Parking Garage [J] . XUAN Dekun, MA Xiaolu, LI Chongchong, 国际设备工程与管理（英文版） . 2019,第001期
2. Reconfigured test architecture optimization for TSV-based three-dimensional SoCs [J] . Dong Xiang, Kele Shen, Zhou Jiang IEICE Electronics Express . 2014,第16期

机译：针对基于TSV的三维SoC重新配置测试架构的优化
3. Multi-objective optimization of design and testing of safety instrumented systems with MooN voting architectures using a genetic algorithm [J] . A.C. Torres-Echeverria, S. Martorell, H.A. Thompson Reliability Engineering & System Safety . 2012,第期

机译：基于遗传算法的MooN投票架构的安全仪表系统设计和测试的多目标优化
4. Design and Optimization of Test Architecture for IP Cores on SoC Based on Multi-objective Genetic Algorithm [J] . Enmin Tan, Peng Wang Journal of Computers . 2013,第2期

机译：基于多目标遗传算法的SoC IP核心测试架构的设计与优化
5. Test architecture design and optimization for three-dimensional SoCs [C] . Li Jiang, Lin Huang, Qiang Xu Design, Automation amp; Test in Europe Conference amp; Exhibition, 2009. DATE '09 . 2009

机译：三维SoC的测试架构设计和优化
6. Technology Mapping, Design for Testability, and Circuit Optimizations for NULL Convention Logic Based Architectures. [D] . Alibeygi Parsan, Farhad. 2014

机译：基于NULL Convention Logic的架构的技术映射，可测试性设计和电路优化。
7. Analytic Models of Oxygen and Nutrient Diffusion Metabolism Dynamics and Architecture Optimization in Three-Dimensional Tissue Constructs with Applications and Insights in Cerebral Organoids [O] . Richard J. McMurtrey -1

机译：三维组织结构中氧气和营养物扩散代谢动力学和结构优化的分析模型及其在脑类器官中的应用和见解
8. Test Architecture Design and Optimization for Three-dimensional SoCs [O] . Li Jiang, Lin Huang, Qiang Xu 2009

机译：None
9. Flexible Client-server Architecture Designed for Testing Optimized Link State Routing (OLSRv2) for Component-based Routing (CBR) [R] . James, J. 2009

机译：灵活的客户端 - 服务器架构，旨在测试基于组件的路由（CBR）的优化链路状态路由（OLsRv2）

Test architecture design and optimization for three-dimensional system-on-chips.

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