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A simulation-based design method to transfer surface mount RF system to flip-chip die implementation

机译:基于仿真的设计方法将表面贴装射频系统转移到倒装芯片实现中

摘要

The flip-chip technology is a high chip density solution to meet the demand for very large scale integration design. For wireless sensor node or some similar RF applications, due to the growing requirements for the wearable and implantable implementations, flip-chip appears to be a leading technology to realize the integration and miniaturization. In this paper, flip-chip is considered as part of the whole system to affect the RF performance. A simulation based design is presented to transfer the surface mount PCB board to the flip-chip die package for the RF applications. Models are built by Q3D Extractor to extract the equivalent circuit based on the parasitic parameters of the interconnections, for both bare die and wire-bonding technologies. All the parameters and the PCB layout and stack-up are then modeled in the essential parts' design of the flip-chip RF circuit. By implementing simulation and optimization, a flip-chip package is re-designed by the parameters given by simulation sweep. Experimental results fit the simulation well for the comparison between pre-optimization and post-optimization of the bare die package's return loss performance. This design method could generally be used to transfer any surface mount PCB to flip-chip package for the RF systems or to predict the RF specifications of a RF system using the flip-chip technology.
机译:倒装芯片技术是一种高芯片密度解决方案,可满足超大规模集成设计的需求。对于无线传感器节点或某些类似的RF应用,由于对可穿戴和可植入实现的需求不断增长,倒装芯片似乎是实现集成和小型化的领先技术。在本文中,倒装芯片被认为是影响射频性能的整个系统的一部分。提出了一种基于仿真的设计,可将表面安装PCB板转移到RF应用的倒装芯片封装中。 Q3D提取器建立了模型,以基于互连的寄生参数提取裸芯片和引线键合技术的等效电路。然后,将所有参数以及PCB布局和叠层建模在倒装RF电路的基本部件设计中。通过实现仿真和优化,可以根据仿真扫描给出的参数重新设计倒装芯片封装。实验结果非常适合仿真,以比较裸芯片封装的回波损耗性能的预优化和后优化。这种设计方法通常可用于将任何表面安装的PCB转移到RF系统的倒装芯片封装中,或使用倒装芯片技术预测RF系统的RF规格。

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