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Compiling Regular Expressions into Non-Deterministic State Machines for Simulation in SystemC

机译:将正则表达式编译到非确定性状态机中以在SystemC中进行仿真

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摘要

With Moore’s law exponentially increasing the number of transistors on inte-grated circuits, developers fail to keep up. This makes chip area an increasinglycheap resource. At the same time, researchers and developers are trying to findways to dynamically reconfigure FPGAs, preferably at run time, so as to in-crease the flexibility of hardware solutions, and close the gap between the speedof hardware and flexibility of software. A proposed way of solving both of theseissues at once is by using nondeterministic finite-state machines as a fundamen-tal unit of design. This could provide great flexibility and dynamic hardwaresolutions, but before this can be known for sure, a system like this would needto be simulated. This paper documents the planning and development of a Sys-temC library that creates nondeterministic finite-state machines from regularexpressions, and a special regular expression syntax designed for this specificapplication. The paper can also be used as a reference for the inner workingsof, and how to use, the library.
机译:随着摩尔定律成倍增加集成电路上晶体管的数量,开发人员无法跟上发展的步伐。这使得芯片面积越来越便宜。同时,研究人员和开发人员正在设法找到方法,最好在运行时动态地重新配置FPGA,以增加硬件解决方案的灵活性,并缩小硬件速度和软件灵活性之间的差距。解决这两个问题的一种建议方法是使用非确定性有限状态机作为设计的基本单位。这样可以提供极大的灵活性和动态的硬件解决方案,但是在确定这一点之前,必须先模拟这样的系统。本文记录了Sys-temC库的规划和开发,该库从正则表达式创建了不确定的有限状态机,并为此特殊应用设计了特殊的正则表达式语法。本文还可以用作库的内部工作以及如何使用的参考。

著录项

  • 作者

    Volden Kjetil;

  • 作者单位
  • 年度 2011
  • 总页数
  • 原文格式 PDF
  • 正文语种 eng
  • 中图分类

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