Code Generation for Transport Triggered Architectures (Code Generatie voorTransport Triggered Architectures)

摘要

The major contributions of this dissertation are: (1) the development of aprototype compiler for TTAs, (2) the evaluation of TTAs, and (3) the development of a design space exploration method. Chapter 2 describes the basics of instruction level parallelism and introduces TTAs. Chapter 3 starts with basic block scheduling for TTAs. In chapter 4, extend basic block scheduling which moves operations across basic block boundaries in order to find more parallelism. These movements are between basic blocks of the same loop iteration if they belong to a loop body. This restriction is lifted in chapter 5. In chapter 6, we describe experiments to evaluate various aspects of TTAs and code generation for TTAs. Chapter 7 describes the design space exploration method and a case study to see how the method works out in practice. Chapter 8 concludes this thesis with a summary and suggestions for future research.