Addition Related Arithmetic Operations with Threshold Logic.

摘要

In this dissertation we assume integrated circuit fabrication technologies that strictly speaking do not perform primitive Boolean logic and investigate threshold gate networks for addition and addition related computer arithmetic operations. We first present networks of O (log n) depth and size, and O (n) weight and fan-in complexities for an important class of symmetric Boolean functions, the periodic symmetric Boolean functions. Consequently, we propose a general threshold logic framework for the computation of serial addition and multiplication and investigate the implications our schemes have to the performance and cost of the networks under small weights and small fan-in requirements.