Application of Signal Flow Graph in Concurrent Circuit Simulation

摘要

Circuit Signal Flow Graph (SFG) is a graphic representation of an electric network, reflecting the interactions among the circuit elements. It has turned out to be a very useful tool for relaxation-based circuit simulation in circuit partitioning and partition scheduling steps which are of critical importance to iterative methods. SFG can also be used to explore the inherent parallelism in large circuits for concurrent circuit simulation. In the paper, algorithms based on SFG for circuit partitioning and partition scheduling are given. To overcome the difficulties of both human effort and running time in using large real circuits for testing, a method is proposed which generates realistic SFG of artificial test circuits whose properties are derived from real life circuits. Finally, some preliminary results are reported. (Copyright (c) GMD 1988.)