AddGen: A Module Generator for Area-Time Efficient Adders

摘要

The report is on AddGen, a generator for area-time efficient Carry Look Ahead Adders. The research is an attempt to make the design path of Carry Lookahead Adders more controllable and to solve the partitioning problem. Topics include: AddGen's system architecture; estimation techniques; adders generated by AddGen compared with the Ripple Adder, the Recurrence Solver and the Variable Block Adder; conclusions on the usefulness of AddGen.