Contribution to the Question of Digital Multiplex Hierarchy . Beitrag Zur Frage der Digitalen Multiplex-Hierarchie

摘要

A digital multiplex hierarchy is proposed for clock synchronization based on the PCM primary multiplex system operating at a bit rate of 2.048 Mbit/s and with multiplex factors of 4. The positive-negative stuffing technique is used. This concept provides very simple and uniform frame structures at each stage of the hierarchy, allowing without difficulties the transition to the synchronous network and thus to PCM exchanges. The second-order multiplex system allows one or two picture telephone signals to be transmitted at 8.448 Mbit/s and the third-order multiplex system a color television signal at 34.304 Mbit/s. Additional line systems can be obtained which make the proposed hierarchy more flexible by synchronous bit-by-bit interleaving of two information rates in the same stage of the hierarchy.