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Assembly and Cleaning of CSPs for High, Low, and UltraLow Volume Applications

机译：用于高，低和超低容量应用的Csp的组装和清洁

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摘要

The JPL-led CSP Consortium of enterprises representing government agencies and private companies has joined together to pool in-kind resources for developing the quality and reliability of chip scale packages (CSPs) for a variety of projects.

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作者
Ghaffarian, R.; Mehta, A.; Bonner, J.; Achong, C.; Vogler, O.; Phillips, D.; Celestica, A.; Mehrotra, M.; Simeus, M.; Stegura, S.;
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年度 2000
页码 1-8
总页数 8
原文格式 PDF
正文语种 eng
中图分类工业技术;
关键词
CHIPS; CLEANING; ORGANIZATIONS; RELIABILITY; SOLDERS; electronic assembly SMT chip scale package CSP solder volume fine pitch;

机译：芯片;清洗;组织;可靠性;焊料;电子组装smT芯片规模封装Csp焊料体积细间距;

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Assembly and Cleaning of CSPs for High, Low, and UltraLow Volume Applications

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