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Digital signal array processor for NSLS booster power supply upgrade

机译:用于NsLs升压电源升级的数字信号阵列处理器

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The booster at the NSLS is being upgraded from 0.75 to 2 pulses per second. To accomplish this, new power supplied for the dipole, quadrupole, and sextupole have been installed. This paper will outline the design and function of the digital signal processor used as the primary control element in the power supply control system.

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