Development of high reliability planar chip inductors

摘要

A process for fabrication of multilayer planar chip inductors on ceramic wafers has been developed. This paper will summarize the progress made in the use of step-and-repeat print processes to fabricate a family of high reliability planar chip inductors for surface mount RF applications. Experimental data on thick-film gold and plated-copper windings are presented. In addition, the development of an automated RF probe station and waferized calibration standards are discussed.