Discriminator with a current-sum multiplicity output for the PHENIX multiplicity vertex detector

摘要

A current output multiplicity discriminator for use in the front-end electronics (FEE) of the Multiplicity Vertex Detector (MVD) for the PHENIX detector at RHIC has been fabricated in the a 1.2-(micro) CMOS, n-well process. The discriminator is capable of triggering on input signals ranging from 0.25 MIP to 5 MIP. Frequency response of the discriminator is such that the circuit is capable of generating an output for every bunch crossing (105 ns) of the RHIC collider. Channel-to-channel threshold matching was adjustable to (+-) 4 mV. One channel of multiplicity discriminator occupied an area of 85 (micro) x 630 (micro) and consumed 515 (micro)W from a single 5-V supply. Details of the design and results from prototype device testing are presented.