A Preliminary Cost Study of the Dual Mode Inverter Controller

摘要

In 1998, the Power Electronics and Electric Machinery Research Center (PEEMRC) at the Oak Ridge National Laboratory (ORNL) started a program to investigate alternate field weakening schemes for permanent magnet (PM) motors. The adjective ''alternate'' was used because at that time, outside research emphasis was on motors with interior-mounted PMs (IPMs). The PEEMRC emphasis was placed on motors with surface-mounted PMs (SPMs) because of the relative ease of manufacturing SPM motors compared with the IPM motors. Today the PEEMRC is continuing research on SPMs while examining the IPMs that have been developed by industry. Out of this task--the goal of which was to find ways to drive PM motors that inherently have low inductance at high speeds where their back-emf exceeds the supply voltage--ORNL developed and demonstrated the dual mode inverter control (DMIC) [1,2] method of field weakening for SPM motors. The predecessor of DMIC is conventional phase advance (CPA), which was developed by UQM Technologies, Inc. [3]. Fig. 1 shows the three sets of anti-parallel thyristors in the dashed box that comprise the DMIC. If one removes the dashed box by shorting each set of anti-parallel thyristors, the configuration becomes a conventional full bridge inverter on the left driving a three phase motor on the right. CPA may be used to drive this configuration ORNL's initial analyses of CPA and DMIC were based on driving motors with trapezoidal back-emfs [4-6], obtained using double layer lapped stator windings with one slot per pole per phase. A PM motor with a sinusoidal back-emf obtained with two poles per slot per phase has been analyzed under DMIC operation as a University of Tennessee-Knoxville (UTK) doctoral dissertation [7]. In the process of this research, ORNL has completed an analysis that explains and quantifies the role of inductance in these methods of control. The Appendix includes information on the equations for the three components of phase inductance, L{sub gap}, L{sub slot}, and L{sub endturns}. PM motors inherently have a lower inductance because of the increase in effective air gap caused by the magnet, which is in the denominator of the equation for L{sub gap}. L{sub gap} accounts for about half of the phase inductance. Because of the low inductance, there is a propensity for currents to exceed the motor's rated value. DMIC solves this problem for low-inductance PM motors and, in addition, provides a number of safety features that protect against uncontrolled generator mode operation [8,9]; however, the DMIC topology adds a pair of anti-parallel thyristors in each of the three phases, thereby introducing additional silicon costs as well as additional voltage drops during operation. It poses the tradeoff question; under what conditions can the beneficial features of DMIC offset its additional silicon cost and voltage drop losses? The purpose of this report is to address the tradeoff question. Sections of the report will: (1) review the role of self-inductance in performance and control of PM motors, (2) discuss the bounding inductances for motors with trapezoidal back-emfs under CPA control, (3) discuss the bounding inductances for trapezoidal back-emfs under DMIC, (4) discuss the bounding inductances for the PM synchronous motor (PMSM), (5) present the analysis showing how DMIC minimizes current in PMSMs, (6) present the results of a cost study conducted for two motors driven using a CPA inverter and for two motors driven using DMIC, (7) discuss estimating life cycle cost benefits, and (8) present conclusions.