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BIT RATE GENERATOR AND RAW DATA CONDITIONER

机译:比特率发生器和原始数据调节器

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摘要

A phase lock loop system, which derives reliable phase and frequency information under adverse signal-to-noise conditions, is employed in color television, telemetry receivers, and discriminators. This type of circuit has been utilized to derive bit rate frequency and phase from a nonreturn to zero PCM signal under adverse signal-to-noise ratios.nThis information is derived by having a phase lock loop locked to the bit rate. This "a priori" knowledge of time and phase of possible bit change is utilized by sampling pulses which occur in each bit interval. By using appropriate pulse width and pulse delay circuits, the timing and width of the sampling pulses can be optimized for low signal-to-noise ratios.

著录项

  • 作者

    S. C. Steely;

  • 作者单位
  • 年度 1961
  • 页码 1-16
  • 总页数 16
  • 原文格式 PDF
  • 正文语种 eng
  • 中图分类 工业技术;
  • 关键词

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