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Signal Flow Model for Sequential Logic Built from Combinational Logic Elements and Its Implementation in Prolog

机译：组合逻辑单元构成的序列逻辑信号流模型及其在prolog中的实现

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摘要

A signal flow model is described that uses memory devices from combinational logic. The implementation of this model in Prolog is also presented. (ERA citation 10:015497)

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作者
Gabriel, J. R.; Roberts, P. R.;
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年度 1984
页码 1-20
总页数 20
原文格式 PDF
正文语种 eng
中图分类工业技术;
关键词
Memory Devices; Diagnostic Techniques; Digital Computers; Electronic Circuits; Logic Circuits; Performance Testing;

机译：存储器件;诊断技术;数字计算机;电子电路;逻辑电路;性能测试;
入库时间 2022-08-29 11:29:23

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1. Efficient modelling and synthesis procedure of asynchronous sequential logic elements [J] . Kang J.-W., Fisher P.D. IEE proceedings. Part E . 1994,第1期

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2. Implementation of some high speed combinational and sequential logic gates using micro-ring resonator [J] . Kumar Ajay, Raghuwanshi Sanjeev Kumar Optik: Zeitschrift fur Licht- und Elektronenoptik: = Journal for Light-and Electronoptic . 2016,第20期

机译：使用微环谐振器实现一些高速组合逻辑逻辑门和顺序逻辑门
3. Accurate Timing and Noise Analysis of Combinational and Sequential Logic Cells Using Current Source Modeling [J] . Nazarian S., Fatemi H., Pedram M. Very Large Scale Integration (VLSI) Systems, IEEE Transactions on . 2011,第1期

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4. Evaluating fault coverage of bulk built-in current sensor for soft errors in combinational and sequential logic [C] . Egas Henes Neto, Ivandro Ribeiro, Michele Vieira, Symposium on Integrated circuits and system design;Annual symposium on Integrated circuits and system design;SBCCI . 2005

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Signal Flow Model for Sequential Logic Built from Combinational Logic Elements and Its Implementation in Prolog

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