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Signal processing algorithms on parallel architectures: A performance update.

机译：并行体系结构上的信号处理算法：性能更新。

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The Burg algorithm is a widely applied and extensively studied signal processing procedure having a structure typical of a class of important batch signal processing algorithms. Its implementation and performance on four different parallel machines were r ...

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作者
D. Rover V. Tsai Y. S. Chow J. Gustafson;
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年度 1991
页码 1-21
总页数 21
原文格式 PDF
正文语种 eng
中图分类工业技术;
关键词
Algorithms; Array Processors; Distributed Data Processing; EDB/990200; Parallel Processing; Performance; Signal Conditioning;

机译：算法;阵列处理器;分布式数据处理; EDB / 990200;并行处理;性能;信号调节;

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1. Improving the Performance of Hyperspectral Image and Signal Processing Algorithms Using Parallel, Distributed and Specialized Hardware-Based Systems [J] . Antonio Plaza, Javier Plaza, Hugo Vegas Journal of Signal Processing Systems . 2010,第3期

机译：使用基于并行，分布式和专用硬件的系统提高高光谱图像和信号处理算法的性能
2. Improving the Performance of Hyperspectral Image and Signal Processing Algorithms Using Parallel, Distributed and Specialized Hardware-Based Systems [J] . Antonio Plaza, Javier Plaza, Hugo Vegas Journal of VLSI signal processing systems . 2010,第3期

机译：使用基于并行，分布式和专用硬件的系统提高高光谱图像和信号处理算法的性能
3. High Performance VLSI Signal Processing: Innovative Architectures and Algorithms [J] . Volume I – Algorithms, ArchitecturesEdited by K. J. Ray LIU, Kung YAO. IEEE Press. 1998ISBN 0-7803-3468-XIng. Horacio Villagarc?-a Journal of Computer Science and Technology . 2001,第11期

机译：高性能VLSI信号处理：创新的体系结构和算法
4. Analysis of the structural efficiency of digital signal processing algorithms and their implementation on parallel processing architectures [C] . Lee, P.W., Davidovici, . 1990

机译：数字信号处理算法的结构效率分析及其在并行处理架构上的实现
5. Scalable parallel VLSI architectures and algorithms for digital signal and video processing. [D] . Elnaggar, Ayman Ibrahim. 1998

机译：用于数字信号和视频处理的可扩展并行VLSI架构和算法。
6. A Parallel Architecture for the Partitioning around Medoids (PAM) Algorithm for Scalable Multi-Core Processor Implementation with Applications in Healthcare [O] . Hassan Mushtaq, Sajid Gul Khawaja, Muhammad Usman Akram, 2018

机译：围绕Medoids（PAM）算法进行分区的并行体系结构可实现可扩展的多核处理器及其在医疗保健中的应用
7. The VEGA moderately parallel MIMD, moderately parallel SIMD, architecture for high performance array signal processing [O] . Taveniku, Mikael, Åhlander, Anders, Jonsson, Magnus, 1998

机译：VEGA中度并行MIMD，中度并行SIMD，用于高性能阵列信号处理的架构
8. Signal processing algorithms on parallel architectures: A performance update [R] . Rover, D., Tsai, V., Chow, Y. S., 1991

机译：并行体系结构上的信号处理算法：性能更新

Signal processing algorithms on parallel architectures: A performance update.

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