Sigma-Delta Modulator for Wide Bandwidth Applications

摘要

A wide-band sigma-delta modulator is disclosed having a cascade of two modulatorsor stages, the first stage being of third or greater order and the second being of second or greater order. Both stages utilize simple ternary quantizers to avoid linearity problems associated with the digital to analog converters in the feedback paths of the modulators and to maintain stable operation. Additional zeros are placed in the noise transfer functions of third or higher order stages by means of additional feed back loops between the output of the third integrator and the second summing junction to maximize the dynamic range. The new topology significantly enhances the dynamic range of the system while hardly affecting the circuit's sensitivity with regard to some non-idealities such as finite amplifier open-loop gains or capacitor ratio mismatches. The excess dynamic range gained by these additional zeros is substantial and independent of OSR, hence, the present invention is particularly useful in wide-band applications where the OSR is inherently low. By employing only two cascaded stages, amplifier gain and capacitor ratio matching requirements are kept reasonably low.