Tbit/s Optical Packet Processing using the Resonant Soliton Logic Gates

摘要

Optical packet processing is emerging as one of the key technologies for implementation of future ultra high-speed and multi-functional TDM networks. An essential element of these networks is a receiver node with functionalities which include packet address recognition, packet routing, buffering and rate conversion. In this research program, a possibility of Tbit/s optical packet processing in a TDFM receiver node using the resonant solition switches and logic gates has been demonstrated. The address recognition function for incoming optical packets has been performed numerically at 2 Tbit/s and 200 Gbit/s data rates. Buffering of optical packets to produce multiple copies of the inputs has been modelled using 3 x 3 nonlinear directional coupler configuration; the simulations have been performed at two different data rates; 3 Tbit/s and 500 Gbit/s. A simple scheme to upconvert the repetition rate of an optical clock stream has been proposed, and the repetition rate multiplication from 250 Gbit/s to 1 Tbit/s has been demonstrated. A possible scheme to achieve the data rate down-conversion in the case of optical packets of arbitrary format has been described. The examples of demultiplexing of optical clock streams and optical packets at 3 Tbit/s have been presented. The operating characteristics of the components in the receiver node have been assessed. To our knowledge, this is the first demonstration of the possibility of optical packet processing at Tbit/ s data rates.