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Computer Architecture for Energy Efficient SFQ.

机译:节能型sFQ的计算机体系结构。

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摘要

This report identifies a candidate architecture for an energy efficient SFQ-based processor unit. It quantitatively analyzes candidates for register and main memory with respect to access time, density and energy efficiency. Finally, it investigates the efficacy of three dimensional integration (3DI) for enhancing aerial circuit density.

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