Picosecond-Accuracy Digital-to-Time Converter for Phase-Interpolation DDS

摘要

A high-resolution CMOS Digital-to-Time Converter for Direct-Digital- Synthesis (DDS) applications is presented in this paper. The novel architecture permits one to perform 4096 phase-interpolation levels introducing a delay proportional to a 12-bit digital control word with a resolution of about 2 ps. The virtual multiplication of the 120 MHz accumulator clock frequency by the factor 4096 is, thus, realized achieving a great reduction of the DDS output spurious components. The phase interpolation, implemented in two steps, is based on Delay-Locked Delay-Lines that are able to assure the reliability of the introduced delay by fully compensating environmental and process variations. The circuit is very compact in terms of occupied silicon area, since it employs only 35 delay-cells.