Performance On-Demand Approach to Power-Efficient Computing

摘要

Complexity-Adaptive Processing (CAP) addresses increasing microprocessor power dissipation through on-the-fly, low-cost hardware adaptation and related circuit techniques so as to better match hardware complexity and speed to application demands. Specific results include adaptive processing elements and hardware/software control techniques, a Multiple Clock Domain processor that saves energy via fine-grain voltage scaling, power- efficient issue queue and register file techniques, a low-leakage dynamic logic circuit and associated control logic for functional units, multi-threaded power and noise reduction, efficient on-chip dc-dc conversion and clock control circuits, low power domino logic and interface circuits, and interconnect width optimization for low power. Overall, a several-fold reduction in power is demonstrated via the collective application of these various techniques.