Matrix Dilations via Cosine-Sine Decomposition

摘要

This report originated in the Eta (infinity) Research Initiative of the Office of Naval research and the In-House Laboratory Independent Research (ILIR) Program of Space and Naval Warfare Systems Center San Diego (SSC San Diego). These programs focused on Eta (infinity) engineering for fleet applications wideband impedance matching and wideband amplifier optimization. Research in these applications produced several papers (33), (32), (2), (3), four patents, a book (1), and sparked the Defense Advanced Research Projects Agency's interest in digital Eta (infinity) engineering. Eta (infinity) engineering computes the best possible performance bounds. For example, a wideband antenna should be matched to the line impedance to minimize power and prevent amplifier burnout. The circuit designer matches the antenna by searching for a lossless 2-port that minimizes the Voltage Standing Wave Ratio (VSWR).Traditionally, the circuit designer guesses a 2-port topology and then optimizes over its circuit elements. This process is repeated over various topologies, hoping that a 2-port that is 'good enough' turns up. In contrast, ETA (infinity) engineering computes the smallest VSWR attainable by any lossless matching 2-port independent of circuit topology (21). this best VSWR provides an absolute benchmark to assess candidate circuits and brings some order to matching-circuit selection.