Implementation of a Quadrature Mirror Filter Bank on an SRC Reconfigurable Computer for Real-Time Signal Processing

摘要

This thesis describes the design and implementation of a Quadrature Mirror Filter Bank on a general purpose Field Programmable Gate Array. The physical connections and signaling specifications for connecting an Analog to Digital converter to a Reconfigurable Computer system manufactured by SRC Computers Incorporated are discussed. Design and implementation of a fully functional prototype Quadrature Mirror Filter Bank is detailed, with a discussion for extending the functionality to larger more practical designs. Performance and device utilization results between the Quadrature Mirror Filter Bank implemented in VHDL, design elements implemented in the C programming language, and calculations made using high precision mathematical tools are compared, along with relative effort levels required to achieve results using the different hardware instantiation methods.