Using Mitrion-C to Implement Floating-Point Arithmetic on a Cray XD1 Supercomputer

摘要

Field-Programmable Gate Arrays (FPGAs) are of interest to the high performance computing (HPC) computing community because they offer lower power consumption and higher throughput compared to traditional processors. Recently, the implementation of floating-point operations on FPGAs has become possible as the amount of memory available on FGPAs has increased. Unfortunately, advances in technology have also increased the complexity of creating hardware designs for FPGAs. In this project, we describe our experiences using the Mitrion-C high-level language to implement floating-point calculations on a Cray XD1. We report resource consumption, throughput, and power consumption and conclude that Mitrion simplifies the hardware design process while successfully harnessing the computational power of FPGAs at little additional cost to power consumption.