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Floating-Point Numeric Function Generators Based on Piecewise-Split EVMDDs.

机译:基于分段分裂EVmDD的浮点数值函数发生器。

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This paper proposes a new architecture for memory-based floating- point numeric function generators (NFGs). The design method uses piecewise- split edge-valued multi-valued decision diagrams (EVMDDs). To design NFGs with less memory size, we partition the domain of the floating-point function into segments, and represent the function using an EVMDD for each segment. By realizing each EVMDD with hardware, we obtain the floating-point NFG. This paper also presents an algorithm that partitions the domain by decomposing the edge-valued binary decision diagram (EVBDD) representing the whole floating- point function. Experimental results show that, for a single-precision floating- point function, our new NFG requires 40% to 65% less memory than any previous one for generic function.

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