A MODULAR REALIZATION OF SYMMETRIC SEQUENTIAL MACHIMES

摘要

The purpose of this thesis is to investigate the realization of a class of sequential machines which display certain symmetries in their state diagrams. The thesis is concerned with the cascade-parallel inter-connection of elementary, rather than arbitrarily complex, asynchronous sequential machines. It is recognized that not all sequential machines may be realized using these elementary modules, nor will the machines developed be necessarily minimal.