Study and Investigation of Technique for Constructing Medium-Speed Random Access Mass Memory

摘要

This document reports on the feasibility of constructing medium speed random access mass memories using batch fabrication techniques. The batch fabrication technique makes use of toroids etched out of sheet permalloy to batch fabricate the memory elements, and all drive and sense wiring is provided by a combination of precision etching and plating techniques. The resultant memory is inherently low power. System designs have been developed which use, for the most part, integrated circuitry. The resulting mass memory system of, say, 10 to the 8th power bits capacity is small (2 to 5 cubic feet), light (300 pounds), economical (less than one cent/bit), low power (less than 200 watts), medium speed (read-write cycle 25 to 35 microseconds), nonvolatile (magnetic), and also permits non-destructive readout. The major accomplishments have been the successful fabrication of planes having 16 x 16 bits on 25 mil centers with reasonable and steadily improving yield, initial success at fabricating 64 x 64 bit planes on 25 mil centers using mechanical pin registration, study of materials applicable to the memory, establishment of an economical manufacturing process, and experimental and theoretical investigations of S/N as it relates to such large scale memories. (Author)